1. Field of the Invention
The present invention relates to a semiconductor device employing a ferroelectric substance and a method of manufacturing the same.
2. Description of Related Art
A ferroelectric memory (FeRAM: Ferroelectric Random Access Memory) holding data through the hysteresis of a ferroelectric substance is known as one of nonvolatile memories.
In general, there are two types of ferroelectric memories having different cell structures. One of the ferroelectric memories has a 1T1C cell structure including a field-effect transistor for selecting a memory cell and a ferroelectric capacitor, while the other one has a 1T cell structure including a field-effect transistor having a gate insulating film made of a ferroelectric substance.
FIG. 3 is a schematic sectional view showing a portion around a ferroelectric capacitor of a ferroelectric memory having a 1T1C cell structure.
The ferroelectric memory includes a silicon substrate (not shown). A field-effect transistor is formed on the silicon substrate every memory cell. A first interlayer dielectric film 101 made of SiO2 (silicon oxide) is stacked on the silicon substrate. A ferroelectric capacitor 102 is formed on the first interlayer dielectric film 101 every memory cell.
The ferroelectric capacitor 102 has a multilayer structure formed by interposing a ferroelectric film 105 between a lower electrode 103 and an upper electrode 104. The lower electrode 103 and the upper electrode 104 are made of a conductive material containing Ir (iridium). The ferroelectric film 105 is made of PZT (lead zirconate titanate: Pb(Zr,Ti)O3).
The ferroelectric capacitor 102 is formed by stacking a multilayer film made of the materials for the lower electrode 103, the ferroelectric film 105 and the upper electrode 104 on the first interlayer dielectric film 101, thereafter forming an etching mask on the multilayer film and etching portions of the multilayer film exposed from the etching mask. Ir and PZT are hard to etch, and hence the ferroelectric capacitor 102 has a trapezoidal sectional shape tapered upward.
The surfaces of the first interlayer dielectric film 101 and the ferroelectric capacitor 102 are covered with a hydrogen barrier film 106 made of Al2O3 (alumina). Thus, the ferroelectric film 105 can be prevented from characteristic deterioration resulting from hydrogen reduction.
A second interlayer dielectric film 107 made of SiO2 is stacked on the hydrogen barrier film 106.
A via hole 108 is formed in the second interlayer dielectric film 107 above the ferroelectric capacitor 102. The via hole 108 penetrates through the second interlayer dielectric film 107, further penetrates through the hydrogen barrier film 106, and reaches the upper electrode 104 of the ferroelectric capacitor 102. A barrier metal film 109 made of TiN (titanium nitride) is formed on the inner surface of the via hole 108. A plug (not shown) made of W (tungsten) for electrical connection between the upper electrode 104 and a wire (not shown) is embedded in the via hole 108 through the barrier metal film 109.
Reduction of the thickness of the ferroelectric film 105 has recently been examined, in order to refine the ferroelectric memory and to reduce the voltage thereof.
Sputtering and a sol-gel process are widely known as methods of forming a film (a PZT film) made of PZT employed as the material for the ferroelectric film 105. When a PZT film having a thickness of not more than 100 nm is formed by sputtering or the sol-gel process, however, the PZT film cannot attain crystallinity capable of exhibiting excellent ferroelectricity. Therefore, it is difficult to reduce the thickness of the ferroelectric film 105 (the PZT film) to not more than 100 nm according to sputtering or the sol-gel process.
MOCVD (Metal Organic Chemical Vapor Deposition) may be employed as a film forming method capable of reducing the thickness of the ferroelectric film 105 while ensuring crystallinity thereof. However, a PZT film formed by MOCVD has large crystal grain sizes and inferior surface morphology (has large irregularities formed on the surface thereof). Therefore, the surface morphology of the upper electrode 104 stacked on the ferroelectric film 105 consisting of the PZT film is also deteriorated. Consequently, defective coverage (including a state where the hydrogen barrier film 106 and/or the barrier metal film 109 has an extremely thin portion) of the hydrogen barrier film 106 or the barrier metal film 109 in contact with the hydrogen barrier film 106 may be caused on the upper electrode 104 (the ferroelectric capacitor 102). Defective coverage of the hydrogen barrier film 106 results in characteristic deterioration of the ferroelectric film 105. When defective coverage of the barrier metal film 109 is caused, the barrier metal film 109 may be peeled or corroded due to reaction between WF6 (tungsten hexafluoride) and SiO2 forming the second interlayer dielectric film 107 in the process of embedding the plug made of tungsten in the via hole 108 by CVD (Chemical Vapor Deposition).